Writing on software design, hardware verification, and everything in-between.

All of my long-form thoughts (that I felt were interesting enough to record) on programming, verification, product design, and more, collected in chronological order.

How to Overcome Editor Envy: Why Can't My Editor Do That?

This paper outlines the desired features of a SystemVerilog editor environment and makes the case for implementing this functionality in the Language Server Protocol. Originally presented at DVCon US 2021